1 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 label function cp clock pulse input s 0 ?s 1 select inputs d 0 ?d 7 serial inputs p 0 ?p 7 parallel inputs q 0 ?q 7 data outputs v ees v ee substrate v cca v cco for ecl outputs sy100s341 8-bit shift register max. shift frequency of 600mhz max. clock to q delay of 1200ps i ee min. of ?50ma industry standard 100k ecl levels extended supply voltage option: v ee = ?.2v to ?.5v voltage and temperature compensation for improved noise immunity internal 75k ? input pull-down resistors 70% faster than fairchild 300k at lower power function and pinout compatible with fairchild f100k available in 28-pin plcc package features description the sy100s341 offer eight d-type, edge-triggered flip- flops with both individual inputs for parallel operation as well as serial inputs for bidirectional shifting, and are designed for use in high-performance ecl systems. data is clocked into the flip-flops on the rising edge of the clock. the mode of operation is selected by two select inputs (s 0 , s 1 ) which determine if the device performs a shift, hold or parallel entry function, as described in the truth table. the inputs on these devices have 75k ? pull-down resistors. pin names rev.: i amendment: /0 issue date: april 2007
2 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 package/ordering information ordering information package operating package lead part number type range marking finish sy100s341jc j28-1 commercial sy100s341jc sn-pb sy100s341jctr (1) j28-1 commercial sy100s341jc sn-pb sy100s341jz (2) j28-1 commercial sy100s341jz with matte-sn pb-free bar-line indicator sy100s341jztr (1, 2) j28-1 commercial sy100s341jz with matte-sn pb-free bar-line indicator notes: 1. tape and reel. 2. pb-free package is recommended for new designs. 28-pin plcc (j28-1) q 5 q 4 v cca v cc q 3 v cc p 4 v ee s 0 cp s 1 v ees 4 3 2 1 28 27 12 13 14 15 16 17 19 11 20 10 21 9 22 8 23 7 24 6 top view plcc j28-1 q 2 p 3 26 18 25 5 p 5 p 6 p 7 v ees d 7 q 7 q 6 p 0 v ees p 1 d 0 p 2 q 0 q 1
3 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 block diagram d 7 p 7 q 7 shift left p 6 q 6 p 1 q 1 dc q p 0 q 0 decode s 0 s 1 d 0 cp shift right hold parallel load dc q dc q d c q
4 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 truth table note: 1. h = high voltage level l = low voltage level x = don't care u = low-to-high transition dc electrical characteristics v ee = 4.2v to 5.5v unless otherwise specified; v cc = v cca = gnd inputs outputs function d 7 d 0 s 1 s 0 cp q 7 q 6 q 5 q 4 q 3 q 2 q 1 q 0 load register x x l l u p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 shift left x l l h u q 6 q 5 q 4 q 3 q 2 q 1 q 0 l shift left x h l h u q 6 q 5 q 4 q 3 q 2 q 1 q 0 h shift right l x h l u l q 7 q 6 q 5 q 4 q 3 q 2 q 1 shift right h x h l u h q 7 q 6 q 5 q 4 q 3 q 2 q 1 hold x x h h x no change hold xxxxh hold xxxxl symbol parameter min. typ. max. unit condition i ih input high current, all inputs 200 av in = v ih (max.) i ee power supply current 150 102 71 ma inputs open ac electrical characteristics v ee = 4.2v to 5.5v unless otherwise specified; v cc = v cca = gnd t a = 0 ct a = +25 ct a = +85 c symbol parameter min. max. min. max. min. max. unit condition f shift shift frequency 600 600 600 mhz t plh propagation delay 450 1200 450 1200 450 1200 ps t phl cp to output t tlh transition time 300 900 300 900 300 900 ps t thl 20% to 80%, 80% to 20% t s set-up time ps d n , p n 300 300 300 s n 600 600 600 t h hold time ps d n , p n 300 300 300 s n 0 0 0 t pw (h) pulse width high, cp 600 600 600 ps
5 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 timing diagrams propagation delay and transition times parallel 20% 80% 50% t plh t phl t tlh t thl 0.7 0.1 ns 0.7 0.1 ns 0.95v 1.69v cloc k output 1/fshift tpw (h) 0.95v 1.69v set-up and hold times notes: 1. v ee = 4.2v to 5.5v unless otherwise specified; v cc = v cca = gnd. 2. t s is the minimum time before the transition of the clock that information must be present at the data input. 3. t h is the minimum time after the transition of the clock that information must remain unchanged at the data input. cloc k 50% 1.69v p n , s n , d n t s 50% t h 0.95v 1.69v 0.95v
6 sy100s341 micrel, inc. m9999-042307 hbwhelp@micrel.com or (408) 955-1690 28-pin plcc (j28-1) rev. a micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2006 micrel, incorporated.
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